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Electronic design automation
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#	Item
191	Technical Papers Electrical Design and Modeling Challenges for 3D System Integration Madhavan Swaminathan Power Grid Parasitic Impact on System Level Power Delivery Thao Pham, Vishram Pandit, Almario F. Delos Angeles Ver Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Telecommunications engineering Jitter Synchronization Electronic design automation Signal integrity Field-programmable gate array SerDes Eye pattern PCI Express Electronic engineering Digital electronics Electronics
192	Yosys Manual Clifford Wolf Abstract Most of today’s digital design is done in HDL code (mostly Verilog or VHDL) and with the help of HDL synthesis tools. Add to Reading List Source URL: www.clifford.at Language: English - Date: 2015-02-09 07:25:28 Electronic design Digital electronics Verilog Logic synthesis VHDL Field-programmable gate array High-level synthesis Application-specific integrated circuit Register-transfer level Electronic engineering Electronic design automation Hardware description languages
193	Microsoft Word - Jenkins IMAGE abstract.doc Add to Reading List Source URL: image-society.org Language: English - Date: 2015-03-04 06:22:44 Operations research Simulation Driving simulator Logic simulation Modeling and simulation Virtual reality Network simulation Hardware-in-the-loop simulation Electronic engineering Electronic design automation Digital electronics
194	Scala to the Power of Z3 Integrating SMT and Programming Ali Sinan K¨ oksal, Viktor Kuncak, and Philippe Suter⋆ ´ Ecole Add to Reading List Source URL: lara.epfl.ch Language: English - Date: 2011-05-02 03:09:27 Type theory Data types Functional programming Constraint programming Electronic design automation Satisfiability Modulo Theories Z3 Scala Type inference Computing Software engineering Computer programming
195	Comfusy: A Tool for Complete Functional Synthesis Tool Presentation Viktor Kuncak, Mika¨el Mayer, Ruzica Piskac, Philippe Suter? Swiss Federal Institute of Technology (EPFL), Switzerland Add to Reading List Source URL: lara.epfl.ch Language: English - Date: 2010-05-11 07:07:53 Logic in computer science Formal methods Constraint programming Electronic design automation NP-complete problems Satisfiability Modulo Theories Algorithm Presburger arithmetic Function Mathematics Theoretical computer science Mathematical logic
196	ALINT™ Design Rule Checking Methodology Detects Design Flaws Early Aldec’s ALINT™ design analysis tool identifies critical design Add to Reading List Source URL: www.aldec.com Language: English - Date: 2014-09-11 15:01:15 Integrated circuits Aldec Electronic design VHDL Verilog Field-programmable gate array Application-specific integrated circuit Integrated circuit design Register-transfer level Electronic engineering Electronic design automation Hardware description languages
197	Conference September 19 – 21, 2005 Exhibition September 20 – 21, 2005 Worcester, Massachusetts CD-Rom Conference Proceedings Sponsor: Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Semiconductor companies Electronic design automation Signal integrity Agilent Technologies Field-programmable gate array Cadence Design Systems Intel CPU design Xilinx Electronic engineering Computing Electronics
198	Schematic Design SCHEMATIC DESIGN CONTENTS BOOK 4: UNION STREET SCHEMATIC DESIGN Add to Reading List Source URL: www.waterfrontseattle.org Language: English - Date: 2015-01-07 17:31:04 Schematic Graphic design Design Communication design Electronic design automation Diagramming software Graphics software
199	Active-HDL™ FPGA Design and Simulation Design Creation and Simulation Active-HDL™ is a Windows® based, integrated FPGA Design Creation and Simulation solution for Add to Reading List Source URL: www.aldec.com Language: English - Date: 2014-09-11 14:59:22 Digital electronics Aldec VHDL Verilog Field-programmable gate array Simulink E Specman Electronic engineering Electronic design automation Hardware description languages
200	Course: Satisfiability Modulo Theories (SMT): ideas and applications Send your assignment to: 1. Mark the following formulas as valid, satisfiable or unsatisfiable. a. p  q  p  q b. (p  Add to Reading List Source URL: leodemoura.github.io Language: English - Date: 2015-05-19 13:22:05 NP-complete problems Mathematical logic Electronic design automation Formal methods Logic in computer science Boolean satisfiability problem Resolution Satisfiability Modulo Theories If and only if Theoretical computer science Mathematics Logic

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